Computer Organization and Architecture Unit 4 – Memory: AKTU previous year questions
34 AKTU questions from Unit 4 (Memory) asked in 2020–2026, tagged by marks, year and topic. In short: about 30 marks of every paper come from this unit; the most asked topic is Memory Concept & Hierarchy (11 times); 19 questions came back in a later year. The latest ones are listed below; on the page you can filter them by 2-mark or long questions, topic and repeats.
Unit 4 previous year questions
- Explain the memory hierarchy with diagram. A memory chip has a capacity of 64K × 8. i. Find the number of address lines required. ii. How many such chips are needed to design a 256K × 16 memory system? (7 marks, 2026, Memory Concept & Hierarchy)
- Explain the following cache mapping techniques: i. Direct Mapping ii. Associative Mapping iii. Set-Associative Mapping (7 marks, 2026, Cache Memory)
- Explain 2D and 2½D memory organization. Write their advantages and disadvantages. (7 marks, 2026, Semiconductor RAM & ROM Memories)
- Explain the purpose of ROM memories in computer systems? (2 marks, 2025, Memory Concept & Hierarchy)
- Discuss the characteristics and functionalities of auxiliary memories such as magnetic disks, magnetic tapes, and optical disks? (7 marks, 2025, Auxiliary Memory)
- Design and explain the fundamental concept of computer memory hierarchy? (7 marks, 2025, Memory Concept & Hierarchy)
- Describe the architecture and operation of semiconductor RAM (Random Access Memory) memories such as DRAM (Dynamic RAM) and SRAM (Static RAM)? (7 marks, 2025, Semiconductor RAM & ROM Memories)
- Write a short not on locality of reference. (2 marks, 2024, Memory Concept & Hierarchy)
- Define 2 ½ D memory organization. (2 marks, 2024, Semiconductor RAM & ROM Memories)
- Give classification of memory based on the method of access. Also discuss construction and working of magnetic disk and various components of disk access time. (7 marks, 2024, Memory Concept & Hierarchy)
- Consider a cache (M1) and memory (M2) hierarchy with following characteristics: M1 : 16K word, 50 ns Access time M2 : 1M word, 400 ns Access time Assume 8-word cache blocks and set size 256 words with set associative mapping. (i) Show and explain the mapping between M2 and M1. (ii) Calculate the effective memory access time with cache hit ratio=0.95. (7 marks, 2024, Cache Memory)
- Explain the direct mapping technique. Consider a digital computer has a memory unit of 64k*16 and cache memory of 1k words. The cache uses direct mapping with 4 block size of four words. (i) How many bits are there in the tag, block and word fields of the address format? (ii) How many blocks can the cache accommodate? (7 marks, 2024, Cache Memory)
Most asked Unit 4 topics
- Memory Concept & Hierarchy – asked 11 times
- Cache Memory – asked 10 times
- Semiconductor RAM & ROM Memories – asked 7 times
Unit 4 question pattern
- 2-mark questions: 13 asked in 2020–2026
- 7-mark questions: 9 asked in 2020–2026
- 10-mark questions: 12 asked in 2020–2026
- About 30 marks from Unit 4 in every paper
- 19 questions were asked again in a later year
Unit 4 questions year by year
- 2026: 3 Unit 4 questions asked (21 marks across that year's papers)
- 2025: 4 Unit 4 questions asked (23 marks across that year's papers)
- 2024: 5 Unit 4 questions asked (25 marks across that year's papers)
- 2023: 7 Unit 4 questions asked (38 marks across that year's papers)
- 2022: 5 Unit 4 questions asked (34 marks across that year's papers)
- 2021: 5 Unit 4 questions asked (34 marks across that year's papers)
- 2020: 5 Unit 4 questions asked (34 marks across that year's papers)