Digital Electronics (BOE310) AKTU predicted paper 2026-27
AI-predicted paper for Digital Electronics based on 10 past papers (2022, 2023, 2024, 2025, 2026). NOT an official AKTU paper. Use as a revision tool only.
Paper pattern
- Section A: Attempt all questions. (14 marks)
- Section B: Attempt any THREE questions out of five. (21 marks)
- Section C: Attempt ONE question from each pair (a or b). (35 marks)
Why these questions
- Unit 1 (Digital System, Binary Numbers and Logic Simplification) dominates — 22% avg weightage
- Asked every year: Karnaugh Map Simplification, Multiplexer and Demultiplexer
- Due for comeback: Asynchronous Counters
- Low priority (never asked): Ripple Counters, Interfacing Logic Families
- Most repeated topic: Digital Logic Families
Section A – 2-mark questions
- Explain Duality Principle. Prove that positive logic AND Gate is equivalent to negative logic OR Gate.
- Explain Half adder circuit and implement it using 2-input NAND Gates.
- Define race around condition in JK flip flop.
- Illustrate the term sequential logic.
- What is meant by Fan in and Fan out?
- Convert the following binary number into grey code. 1. (110111)₂ 2. (100110)₂
- What do you mean by a memory?
Section B – sample questions
- Design a full adder and full subtractor using NAND gates only.
- Elaborate a comparison of CMOS, TTL and RTL logic families.
- Discuss different types of RAM memory cell.