Digital Electronics PYQ 2025-26 AKTU Question Paper
AKTU · BTECH · Semester 3, 4 · Digital Electronics · Session 2025-26 · PYQ
AKTU Digital Electronics previous year question paper 2025-26 for B.Tech Semester 3/4. Covers Digital System, Binary Numbers and Logic Simplification…
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Digital Electronics AKTU syllabus
- Unit 1: Digital System, Binary Numbers and Logic Simplification
- Unit 2: Combinational Logic
- Unit 3: Sequential Logic and Its Applications
- Unit 4: Synchronous and Asynchronous Sequential Circuits
- Unit 5: Memory, Programmable Logic and Digital Logic Families
Questions in Digital Electronics AKTU PYQ 2025-26
- Q1a. Represent the decimal number 45 in binary and octal number systems. (2 marks, 2025-26)
- Q1b. Differentiate between combinational and sequential circuits (any two points). (2 marks, 2025-26)
- Q1c. State the function of an encoder. (2 marks, 2025-26)
- Q1d. What is a multiplexer? Write any two applications. (2 marks, 2025-26)
- Q1e. What is a shift register? Name any two types. (2 marks, 2025-26)
- Q1f. What is a hazard in digital circuits? (2 marks, 2025-26)
- Q1g. What is noise margin in logic families? (2 marks, 2025-26)
- Q2a. Explain binary subtraction using 2's complement method with a suitable example. (7 marks, 2025-26)
- Q2b. Design a full subtractor circuit using two half subtractors and basic gates. (7 marks, 2025-26)
- Q2c. Describe the construction and working of a Johnson counter. (7 marks, 2025-26)
- Q2d. Explain the steps involved in state assignment of synchronous sequential circuits. (7 marks, 2025-26)
- Q2e. Compare TTL, ECL and CMOS logic families with respect to power dissipation, speed and noise immunity. (7 marks, 2025-26)
- Q3a. What is Excess-3 code? Convert (57)₁₀ to Excess-3 code and explain the advantages of Excess-3 code over BCD. (7 marks, 2025-26)
- Q3b. Using K-map, minimize the Boolean function and implement it using only NAND gates: F(A,B,C,D)=Σm(0,2,4,5,8,10,12,13). (7 marks, 2025-26)
- Q4a. Explain the operation of a 4-bit priority encoder with truth table and logic diagram. (7 marks, 2025-26)
- Q4b. Design a Full Adder using two Half Adders and basic gates. (7 marks, 2025-26)
- Q5a. Explain the working of a D flip-flop using logic diagram, truth table and characteristic equation. (7 marks, 2025-26)
- Q5b. Explain Ring Counter with diagram and applications. (7 marks, 2025-26)
- Q6a. Explain race conditions in asynchronous sequential circuits. (7 marks, 2025-26)
- Q6b. Explain the complete design procedure of a synchronous sequence detector using state diagram and state table. (7 marks, 2025-26)
- Q7a. Explain fan-in, fan-out and power dissipation in CMOS logic family. (7 marks, 2025-26)
- Q7b. Differentiate between PLA and PAL. Explain how a given Boolean function can be realized using a PLA. (7 marks, 2025-26)
AKTU paper codes: BOE310, BOE410, BOE310H, BOE410H, KOE039, BEE401, KEE401, KOE049
Digital Electronics previous year papers
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